Modern information handling systems use processors that often generate a substantial amount of heat. Thermal throttling techniques exist that sense the temperature of the processor. When the processor's temperature exceeds a predetermined threshold temperature, the system throttles or reduces the processor's clock rate to correspondingly reduce the processor's temperature. In this manner, the system prevents undesirable overheating. Alternatively, the system may employ clock gating, i.e. stopping the processor's clock for at least a portion of the processor's logic circuits for a period of time to reduce the processor's temperature.
Power consumption is a significant contributing factor to the maximum operating frequency of modern processors. Power throttling techniques are available that sense the amount of power that a processor consumes. When the consumed power exceeds a predetermined threshold power level, a power throttling system reduces the operating frequency of the processor so that the processor consumes less power.
In particular, reducing power consumption by the front end of a pipeline processor is important because the front end typically occupies 25%-30% of the area of a modern processor. The pipeline front end often includes several memory arrays such as cache arrays, tag arrays, arrays for address translation and branch prediction arrays. These arrays consume a substantial portion of the processor's power budget.
What is needed is an apparatus and methodology that achieves further reduction in power consumption by processors in information handling systems.